A video to demonstrate how calibre eqDRC can be used in a photonics flow to filter out incorrect false errors due to snapping of curved objects.
Further product details
Calibre nmDRC
Total cycle time is on the rise due to more complex and larger designs, higher error counts and more verification iterations. Calibre® nmDRC responds to the need for reduced cycle time with revolutionary new capabilities that differentiate Calibre nmDRC substantially from traditional DRC tools.
Photonics design
Design your photonic integrated circuit in a layout centric flow using either a drag and drop or a script-driven methodology. Use the same full custom IC design layout editor that drives the physical verification and tape-out processes.
Explore the full Custom IC design flow from Siemens EDA
To get a clear understanding of the key parts of the the solution watch each of these short videos. Whilst they have been composed as a ‘playlist’ each can be viewed standalone
#1 From ‘concept to GDSII’
#2 Schematic capture
#3 Analog simulation
#4 Behavioral simulation
#5 Mixed signal analysis
#6 Physical layout design
#7 Physical verification
#8 Post layout simulation
#9 Digital implementation
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Custom IC’s require specialist design tools to go from concept through to GDSII tape out. Learn about the IC design flow we offer.
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