The industry-leading Calibre circuit verification tool suite includes layout vs. schematic (LVS) checking, reliability verification and parasitic extraction.
These tools provide sign-off quality results, as well as integration into Siemens EDA and 3rd-party products for circuit simulation and other downstream requirements.
ACCURACY
Calibre nmLVS delivers accurate circuit behaviour with precise device parameters, while parasitic extraction tools provide the accurate and high-performance extraction required for all design styles.
RELIABILITY
Designers rely on the accuracy of Calibre predictions for silicon performance and reliability to achieve first-time product success.
Calibre nmLVS
Calibre® nmLVS, the market-leading layout vs. schematic physical verification tool, is tightly linked with both Calibre nmDRC and Calibre xRC™ to deliver production-proven…
Calibre xACT
The Calibre xACT tool delivers reference-level accuracy for leading-edge FinFET, custom, analog and RF designs. It is a versatile parasitic extraction platform with…
Calibre xRC Extraction
Performance and accuracy for all designs and nodes Calibre xRC parasitic extraction enables seamless creation of netlists and parasitic debugging in the design environment. The…
Calibre xL
The Calibre xL tool offers designers fast, and accurate extraction of full-chip frequency dependent loop inductance and loop resistance and automatically accounts for return…
Reliability verification
Calibre reliability verification ensures designs are protected against early device failure and long-term performance degradation. A novel logic-driven layout analysis combines schematic and layout parameters for precise, accurate analysis of complex reliability concerns not possible with traditional verification tools.
Calibre PERC
Calibre® PERC™ reliability verification solution Designed to address advanced circuit verification needs for electrostatic discharge (ESD), electrical over-stress (EOS), signals crossing multiple power domains advanced ERC…
