Calibre® nmLVS, the market-leading layout vs. schematic physical verification tool, is tightly linked with both Calibre nmDRC and Calibre xRC™ to deliver production-proven device extraction for both physical verification and parasitic extraction.
Calibre nmLVS performs a vital function as a member of a complete IC verification tool suite by providing device and connectivity comparisons between the IC layout and the schematic. Calibre’s hierarchical processing engine runs Calibre nmLVS, supplying data for modifying the IC design to achieve superior functionality and reliability.
Accurate circuit verification
Calibre nmLVS enables accurate circuit verification because it is able to measure actual device geometries on a full-chip for a complete accounting of physical parameters. These precise device parameters supply the information for back-annotation to the source schematic and the comprehensive data for running simulations. In addition to working with Calibre xRC, Calibre nmLVS can also be used with third party parasitic extraction tools.
Automate advanced, customer-specific ERCs
Calibre nmLVS can now be enhanced with Calibre PERC (Programmable Electrical Rule Checker).
With Calibre PERC, you can automate advanced, customer-specific ERCs to eliminate lengthy and error-prone manual checking. PERC recognises grouped devices that are connected as you describe and measures geometrical data associated with the circuit topology.
- Market leadership
- Best-in-class accuracy
- Future proofed, fast runtime
- Flexibility. For analog/RF design or a multimillion gate IC
- Design debugging and ease-of-use