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Solido Design Environment

Verification of memory, standard cell and analog/RF custom IC design

A comprehensive AI-powered design environment for all SPICE-level design and verification, and is a single unified solution for nominal and variation analysis.

Used by thousands of designers to produce the most competitive products in hp computing, AI, IoT, automotive and mobile applications.

Brute force-accurate signoff variation 1000X faster

  • Orders of magnitude faster than brute-force simulation
  • Full coverage verification across PVTs and Monte Carlo
  • Brute-force Monte Carlo and SPICE accurate high-sigma verification
  • Variation-aware design sensitivity, debugging and optimisation
  • Comprehensive design environment, improves engineering efficiency
  • Significantly reduces documentation time/effort
  • Identifies design weaknesses previously undetectable
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Easy to use and deploy

  • Intuitive GUI for interactive design and analysis
  • GUI or batch mode
  • Works with all process technologies
  • Integrated with leading design
    environments
  • Supports most commercial and in-house SPICE simulators
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