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Using ML methods in production-ready engineering solutions for IC verification [whitepaper]

Semiconductor designs continue to push the envelope of performance, functionality and efficiency while their application scope expands in high-performance computing, automotive solutions and IoT devices. The increased design complexity, scale, and mission-critical operations of semiconductor designs mean that IC verification strategies must evolve to cover exponentially more scenarios.

At the SPICE level, this leads to a significant increase in design and IP verification requirements. In modern SoC design flows, factors like high instantiation count of IP components, variability from manufacturing effects, and extremely low target failure rates all drive the need for verification methodologies targeting 3, 4, 5, or 6-sigma and higher. Combined with the need to verify design performance and functionality over an extensive range of voltage and temperature corners, this results in millions to billions of simulations required to fully verify a design. Because of this, traditional brute force Monte Carlo methods are no longer able to scale to meet verification requirements.

Machine learning (ML) methods provide a way to overcome the limitations of traditional SPICE methods. ML solutions deliver results with orders-of-magnitude faster runtime compared to traditional methods, and many design and verification teams have started to apply ML techniques to introduce new advantages over previous generation methodologies. As a result, we are starting to see breakthrough speedups and coverage increases in this space.

However, with millions or billions of dollars in research, development, and production costs per semiconductor design, ML methods must not only be fast, but also be consistently and verifiably correct.

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