In this episode of the EDA Expert Series, Neel Natekar from Siemens EDA is helping us explore the shift from traditional AMS verification to Digital Mixed-Signal (DMS) methodologies. Discover why mixed-signal teams are adopting DMS, how it improves simulation speed and coverage, and how digital techniques like UVM and coverage-driven verification are transforming the workflow. Learn how solutions like Symphony Pro, Questa, and Solido SPICE enable a scalable, unified approach to mixed-signal verification—helping teams design faster, smarter and with greater confidence.
Further product details
Questa Advanced Simulator
Industry-leading performance and capacity for digital RTL and gate blocks and SoCs from System Verilog & VHDL.
Questa Power-Aware Simulator
The Questa Power-Aware Simulator enables design teams to verify the active power management planned for implementation, but starting much earlier in the design process. Static checks during UPF compilation locate architectural issues, while dynamic checks during simulation find behavioral issues.