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Tanner Digital Implementer

Simplifying the digital implementation process for the analog designers

Synthesis and P&R for the DIGITAL blocks of mixed-signal designs

Tanner Digital Implementer (TDI) is built on an efficient synthesis and powerful P&R (place-and-route) engine.  It is integrated into the L-Edit physical layout tool to address the physical implementation of the digital needs of “Analog on Top” designs.  With analog designs increasingly digitally-assisted  to enhance analog capabilities, such as automated calibration and programmability.

Tanner Digital Implementer is designed to augment a mixed-signal environment rather than be a go-to solution for full digital chips at sub-22nm FinFET nodes.  The result is an effective, cost effective solution made efficient for the types of digital blocks More-than-Moore mixed-signal designers must implement.

  • Timing driven P&R
  • Supports low-power design methodologies
  • Floor plan and power plan functionality

Intuitive and quick learning curve for synthesis and P&R

L-Edit, Tanner’s physical layout tool, is fully integrated with Tanner Digital Implementer making it ideal for IoT designs combining analog and digital.

Import design data, technology data and specify timing

Utilize the streamlined user interface to quickly place and route the control block of an ADC by importing technology data user such as LEF, Liberty and PTF files, specify the Verilog netlist to use and define timing requirements by specifying your clocks or via a SDC file.

Define floor plan and power plan requirements

For floor plan requirements, you can specify chip size, margins, & row site names, or define the requirements in the layout or via a DEF floor plan file. When setting power requirements, you can specify power/ground ring and stripe parameters, or define the requirements in the layout or via a DEF floor plan file. Once setup, you can perform the place and route view the results in L-Edit.