At EDA Solutions, we understand that not every IC design team is in the position to leverage and take advantage of the latest Design-for-Test (DfT) technologies. For companies designing analog-mixed signal (AMS) ICs—especially those in the “Big A, little d” category—the traditional digital-centric DfT portfolio can feel like overkill. That’s why we’re excited to share how Siemens EDA’s Tessent family is evolving to better serve the needs of AMS designers.
Tessent: A market-leading DfT platform
Tessent is Siemens EDA’s comprehensive portfolio for DfT, covering everything from scan insertion and ATPG to yield analysis and in-life monitoring. It’s a platform trusted by leading digital IC design teams worldwide, with a market share that exceeds even that of Siemens’ well-known Calibre platform in some regions.
But what about AMS designers?
Historically, Tessent’s strength has been in digital test. However, Siemens is now focusing on making Tessent more complete solution being relevant and accessible to AMS teams—especially those who are increasingly integrating digital logic into their analog-centric designs.
What’s relevant for AMS designers today?
- Scan test infrastructure: Even in analog-heavy designs, embedded digital logic can benefit from scan-based testing. Tessent’s infrastructure allows for efficient integration of scan chains, including support for mixed-signal interfaces.
- Functional monitoring: With the integration of Embedded Analytics technology, Tessent now supports Silicon Lifecycle Management (SLM) in-life monitoring of ICs. This is particularly valuable for high-reliability applications such as data centers, automotive, and industrial systems.
- Yield analysis and diagnostics: Tessent’s diagnostic tools can identify defect locations and failure modes, helping teams improve yield and reduce test time—even when digital content is minimal.
Coming soon: A new perspective for analog IC test
Here’s where things get exciting.
Shortly, Siemens EDA will introduce a brand-new Tessent product designed specifically for analog IC test. While details are still under wraps, we can share a few tantalizing hints:
- It’s not just another specification based test tool. This new solution is structural, meaning it targets physical defects rather than just verifying functionality.
- It’s designed to reduce test time and cost by avoiding the need for full functional setup.
- It’s built to work with existing test infrastructure without requiring extensive redesign.
- Most importantly, it’s aimed at solving one of the biggest pain points in analog test today: slow, expensive, and hard-to-automate functional testing.
Why this matters
Analog test has long been a challenge. Functional tests are inherently slow and often require complex setups. The upcoming Tessent analog test solution changes the game. By focusing on structural defects, it allows teams to catch manufacturing issues early, reduce reliance on slow functional tests, and ultimately lower test costs without compromising quality.
A call to AMS innovators
At EDA Solutions, we’re already talking to customers about this upcoming product to understand your needs. If you’re working on analog or AMS designs and have ever thought:
- “Analog test is our biggest bottleneck.”
- “We don’t have a good way to catch physical defects.”
- “Our test times are too long and too expensive.”…then we want to hear from you.
Looking ahead
Tessent is a common platform addressing all elements of semiconductor test, enhanced with new capabilities for AMS and a dedicated analog test product on the horizon, Siemens EDA is expanding the reach of its DfT leadership.
At EDA Solutions, we’re here to help you explore what’s possible—whether that’s integrating scan into your AMS design, leveraging in-life monitoring, or preparing for the next generation of analog test.
📩 Interested in learning more or joining the early discussions? Reach out to us here or speak to your local account manager.