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Tessent DFT solutions

The Tessent product suite provides comprehensive silicon test and yield analysis solutions that address the challenges of manufacturing test, debug, and yield ramp for today’s SoCs.

PRODUCT

Tessent LogicBIST

LBIST

Enables ISO 26262 compliance and is the ideal logic built-in self test solution for safety-critical devices such as ICs used in automotive and medical applications.

Tessent LogicBIST is the industry’s leading built-in self-test solution for testing the digital logic components of integrated circuits. It is an ideal test solution for safety-critical devices such as ICs used in automotive and medical applications.

LBIST

LogicBIST

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PRODUCT

Tessent MemoryBIST

Enables comprehensive automation and integration of test, repair, debug and characterisation of embedded memories.

Tessent MemoryBIST provides a complete solution for at-speed test, diagnosis, repair, debug, and characterization of embedded memories. Leveraging a flexible hierarchical architecture, built-in self-test and self-repair can be integrated in individual cores as well as at the top level.

MemoryBIST

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TestKompress

TestKompress benefit

PRODUCT

Tessent TestKompress

Delivering the highest quality embedded deterministic scan test with the lowest manufacturing test cost. It uses a patented on-chip compression technique to create scan pattern sets that have dramatically less test data volume and reduced test time on the automatic test equipment.

TestKompress benefit

Tessent TestKompress

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Automating hierarchical DFT

Tessent Connect flow image

PRODUCT

Tessent Connect

Tessent Connect reduces DFT implementation effort with an optimal automation of the Tessent Shell flow for hierarchical DFT. This addresses the challenges of implementing hierarchical DFT by using intent-driven automation, universal test infrastructure, and future-proof customisation.

Tessent Connect flow image

Tessent Connect

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IJTAG

Tessent IJTAG process flow

PRODUCT

Tessent IJTAG

Tessent IJTAG simplifies the process of connecting any number of IEEE 1687 compliant IP blocks into an integrated, hierarchical network and to communicate commands to the blocks from a single top level access point.

Tessent IJTAG process flow

Tessent IJTAG

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ATPG

Tessent FastScan screenshot

PRODUCT

Tessent FastScan

Tessent FastScan is the gold standard in automatic test pattern generation, creating high-coverage, compact test sets with support for a wide range of fault models, comprehensive design rule checks, extensive clocking support, and innovative algorithms for performance-oriented pattern compaction.

Tessent FastScan screenshot

Tessent FastScan

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Boundary Scan

PRODUCT

Tessent BoundaryScan

A complete solution for automated generation and integration of on-chip test infrastructure, boundary scan, and test access port.

Tessent BoundaryScan supports standard 1149.1 boundary scan cells, 1149.1 and 1149.6 custom cells, and optionally, 1149.6 cells AC-coupled and/or differential I/O cells. It also provides a unique 1149.1-based solution for contactless testing of I/Os.

Tessent BoundaryScan

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Maximise performance of scan-based test

ScanPro process data flow

PRODUCT

Tessent ScanPro

Tessent ScanPro provides advanced scan DFT features that maximise the performance of scan-based test, such as those provided by Tessent TestKompress, Tessent FastScan, and Tessent LogicBIST products.

Product features include DRC fixes, hierarchical scan implementation, scan replacement and stitching.

ScanPro process data flow

Tessent ScanPro

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Streaming Scan Network

PRODUCT

Streaming Scan Network illustration

Tessent Streaming Scan Network

Tessent Streaming Scan Network packetizes test data to dramatically reduce DFT implementation effort and reduce manufacturing test cost. By decoupling core-level and chip-level DFT requirements, each core can be designed with the most optimal compression configuration for that core.

Streaming Scan Network illustration

Tessent Streaming Scan Network

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Mission mode for automotive systems

PRODUCT

Automotive chip test

Tessent MissionMode

Provides automation and on-chip IP to enable semiconductor chips in an automotive electronics system to be tested and diagnosed at any point during a vehicle’s functional operation. This helps to achieve ISO 26262 safety and long-term reliability requirements.

Automotive chip test

Tessent MissionMode

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