EDA Solutions logo

Match pin order of PEX netlist to schematic or other sources

Latest update: 27/7/2021

ID: TN010
Relevant product(s)
: Calibre PEX
Operating systems: Linux RHEL 7 and above
Versions affected: 2006 and above
Relevant area(s): Usage

Summary

The default setting in Calibre PEX is to use the layout pin order. If this causes a mismatch in your flow, you can make Calibre PEX use the schematic’s pin order instead, or other sources.

Details

Use the following statement under “PEX Options > Include tab > Include Rule Statements box”:

PEX PIN ORDER {LAYOUT | {SOURCE | FILE filename [ALLPINS]}}

The above keyword will not change the pins, only the order.

The default option is (Layout). However you can set pin order to source to make it match the schematic. For example:

PEX PIN ORDER SOURCE

There are further options to control the pin order such as “FILE” and “ALLPINS” keywords, for more information please refer to the SVRF document in the references section below or in the “Standard Verification Rule Format” document found under “docs” in the Calibre installation directory.

Please ensure your runset is saved from (File > Save Runset As) and that usage of this command is documented for future reference in your design. When your runset is saved, this setting will be saved with it.

Useful references

[1] Calibre’s Standard Verification Rule Format: https://docs.sw.siemens.com/en-US/product/852852053/doc/DC202106027.docs.svrf_ur.en_us/html/id4fd24002-cda9-423c-8149-3ce564b7ddd5