Full Chip Assembly & Physical Verification
Tanner's analog layout platform is the widely used Tanner L-Edit IC Layout. L-Edit is a complete analog/mixed-signal IC physical design environment that is flexible and highly configurable.
Available for Windows and Linux, L-Edit has a rich feature set and supports critical industry standards such as OpenAccess. Its fast rendering speeds and interactive real-time design rule checking (DRC) have helped to make L-Edit the most popular solution for mixed signal design.
Completing the analog flow is Mentor' foundry compatible verification product Tanner Calibre One DRC/LVS/xRC.
Tape out confidence is a critical step in the design process.
Tanner Calibre® One is an integral part of the Tanner AMS physical design environment providing hierarchical design rule checking (DRC) and layout versus schematic (LVS) verification.
The Calibre platform is the industry-leader for physical verification and is qualified for sign-off by every major IC foundry.
Post Layout Simulation
To enable comprehensive and accurate post-layout analysis and simulation from the L-Edit, Tanner Calibre One xRC delivers robust and accurate parasitic data.
For more details follow these links to the respective pages on mentor.com
Analog Physical Implementation Software Tools