Analog/RF Design Entry and Simulation
Using Mentor's user friendly and powerful design environment, Tanner™ S-Edit, designs can be edited in schematic or Verilog-A format.
Simulation is performed in Tanner T-Spice which is cost effective, fast, accurate and foundry proven. T-Spice integrates easily with other design tools in the flow and is compatible with industry-leading standards. It improves simulation accuracy with advanced modeling, multi-threading support, device-state plotting, real-time waveform viewing, and analysis, and a command wizard for simple SPICE syntax creation.
For RF simulation, Tanner Eldo® RF provides proven RF verification for wireless applications in the connected sensor and IoT markets by employing a set of dedicated algorithms to accurately and efficiently handle the low-power signals in these applications.
For more details follow these links to the respective pages on mentor.com
Analog Design Entry and Simulation Software Tools