Complete Analog design flow

HiPer Silicon gives the designer a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification, which is ideal for analog, mixed-signal, RF and MEMS IC design.

This integrated tools suite shares a common architecture and common User Interface that is consistent across all tools, resulting in a comprehensive, unified software solution that maximizes design productivity while simultaneously reducing total cost of ownership.

HiPer Silicon's advanced features and optional add-in tools improve designer productivity, including Verilog-A simulation, device layout automation, interactive autorouting, foundry-compatible physical verification and parasitic extraction.