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28 Oct 2014

Tanner EDA Finalizes Process Design Kit for Use with ON Semiconductor's I3T50 and I3T80 Intelligent Interface Technology Foundry Processes

MONROVIA, California – October 28, 2014 – Tanner EDA, the catalyst for innovation and leader for design, layout and verification of analog and mixed-signal (A/MS) integrated circuits and ASICs, has released a fully customized process design kit (PDK) for the ON Semiconductor Intelligent Interface Technology I3T50 and I3T80 processes. Providing the density of a 0.35 µm digital process, A/MS capability and high voltage, the ON Semiconductor Intelligent Interface Technology processes directly address the need for increased digital content in a mixed-signal and/or high voltage environment.

ON Semiconductor's I3T50 and I3T80 process technologies support the production of high voltage NDMOS/PDMOS transistors, up to five metal layers, MiM capacitors, and high resolution poly resistors. Also supported are: Zener zap diodes for OTP, high voltage NPN/PNP bipolar transistors, deep trench isolation, and voltages up to 80V. These technologies are complimented by the A/MS tool flow from Tanner EDA, which offers analog/digital simulation, synthesis, timing analysis, place and route, full custom and schematic-driven layout and physical verification.

The Tanner EDA PDK provides schematic library, Spice models, layout set-up (including TC- based parameterizable cells) and verification files for DRC and LVS.

"Tanner EDA has proven to be a high quality and cost-effective design software environment for our Intelligent Interface Technologies, and an ideal solution for smaller companies and start-ups," said Ignace Borde, director of ON Semiconductor's custom foundry business unit. "To meet the fast-growing need for MEMS and sensor interfacing integrated circuits in bullish markets like automotive, industrial and IoT (Internet of Things), ON Semiconductor's I3T50 and I3T80 high performing mixed-signal BCD processes are very well positioned to develop great products at the highest quality levels at the right cost."

This PDK was developed in collaboration with imec IClink, the ASIC design and prototyping service of the nanoelectronics research center, imec. Distribution of the kit is managed by Europractice under an ON Semiconductor-specific non-disclosure agreement (NDA) with imec.

"Time-to-market is the most critical success factor for our customer, and working with ON and imec certainly helps us to meet that need," said Greg Lebsack, president of Tanner EDA. "Our complete design environment, combined with our process design kit, aligns perfectly with our customers' requirements."

For more details and to obtain access to the PDK, please contact us.